CMOS x-sect
Parametric test and modeling (silicon verification)
Validation of specified or modeled device parametrics
Verification of active device parameters
Verification of passive and/or parasitic circuit elements
Analysis of device parametric distributions vs. design specs
Verification of model parameters
 
Full extraction of SPICE models for:
    Transistors, passive elements, or parasitic elements
SPICE model library management
Manual or auto-probe measurements of:
    On-die test structures,
    Scribe lines, or
    Drop-ins
Measurements on wafer, loose die, or packaged die

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